A Finite State Machine (FSM) is a digital design model used to control sequential logic. It consists of a finite number of states, transitions between those states, inputs, and outputs.
The next state of the FSM depends on the current state and input conditions.
An FSM is a sequential circuit that changes its state based on clock signals and input conditions.
Stores the current state.
Determines the next state based on current state and inputs.
Generates outputs based on state and/or inputs.
+----------------+
Inputs -->| Next State |
| Logic |
+----------------+
|
v
+----------------+
Clock --> | State Register |
Reset --> | (Current State)|
+----------------+
|
v
+----------------+
| Output Logic |
+----------------+
|
Outputs
States:
RED
YELLOW
GREEN